I'm currently messing around with a single T7 in preparation to sync two T7's while streaming (to merge the streams) and I'm having trouble getting the stream to run when set to the external clock.
I've set up a PWM out on FIO3 and connected this to CIO3 to clock the stream as well as FIO1 (with PWM in configured) and EIO0 (to just watch it as DIO). If I stream this configuration with STREAM_CLOCK_SOURCE=0 everything works as expected. When I instead set the stream to be externally clocked I get a LJME_INCORRECT_NUM_RESPONSE_BYTES_RECEIVED error. I've tried a few different values of scansPerRead (including low values just to see if I could get something out).
I've also tried setting STREAM_RECEIVE_TIMEOUT_MS to 0 (which surprisingly gave me a SYNCRONIZATION_TIMEOUT error) and also setting STREAM_SCANS_RETURN to ALL_OR_NONE which is returning a NO_SCANS_RETURNED error, which at least makes some sense even though I expect something should be coming through.
I've also tried sending the PWM clock from a separate ue9 which has the same issues, so I assume I'm just misunderstanding something in how the external clocking is supposed to work.
Any ideas or other steps to try would be helpful. Thanks!
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1. Before you start your stream you will need to set STREAM_CLOCK_SOURCE = 2 and STREAM_EXTERNAL_CLOCK_DIVISOR to the number of pulses per stream scan (so 1 if you want one pulse to cause 1 stream scan) on both the T7s you want synchronized. Your PWM signal that is controlling the scan rate needs to be connected to your T7s' CIO3 lines.
2. Make sure you are running the latest T7 beta firmware and see if that helps. You can update your firmware using our Kipling application and the current beta version as of writing is 1.0189.
If the above doesn't resolve the issue, what is your PWM frequency? What channels are you streaming and at what scan rate? Keep in mind that at fastest the maximum sample rate is 100kHz, where SampleRate = ScanRate*#Channels, and the maximum scan rate can vary based analog input settings. Stream sample rates are discussed here:
https://labjack.com/support/datasheets/t7/appendix-a-1
to enable the external clock, on both your T7s
I had overloked the STREAM_EXTERNAL_CLOCK_DIVISOR which is what was giving me problems, I was setting the normal clock divisor but didn't see there was a separate divisor for the external clock. It appears to be working now.
Thanks!