PWM WITH PHASE | LabJack
 

PWM WITH PHASE

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roopeshmeleth
roopesh.meleth's picture
PWM WITH PHASE

DIO#_EF_ENABLE: 0 = Disable, 1 = Enable
DIO#_EF_INDEX: 1
DIO#_EF_OPTIONS: Bits 0-2 specify which clock source to use ... 000 for Clock0, 001 for Clock1, and 010 for Clock2. All other bits reserved and should be set to 0.
DIO#_EF_CONFIG_A: When the clock source's count matches this value the line will transition from high to low.
DIO#_EF_CONFIG_B: When the clock source's count matches this value the line will transition from low to high.

DIO _EF_CONFIG_B ??  iN PWM with phase what is the value of this address ? is it phase offset? how can i check this ?

PhaseOffset = 360º * DIO#_EF_CONFIG_A / DIO_EF_CLOCK#_ROLL_VALUE

LabJack Support
labjack support's picture
CONFIG_B sets the count

CONFIG_B sets the count relative to the source clock at which a rising edge will be generated.

So if the clock source is configured to count from 0 to 9999, CONFIG_A = 4000 and CONFIG_B = 2000.Then the output will go high at 2000 and low at 4000 for a 20% duty cycle.