Wiring requirements for external clocking | LabJack
 

Wiring requirements for external clocking

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Anonymous
_AJ_'s picture
Wiring requirements for external clocking

Hi I'm setting up external clocking for multiple labjacks and I am running into some problems that make me wonder if there is a certain recommended way to wire the devices.

Right now I am running a 50kHz PWM wave at a 50% duty cycle into 2 labjacks that I read 25k data points from every 0.5 seconds. For testing, I am splitting the signal from a foot pedal into the two labjacks as shown in IMG1 and I am splitting the DIO0 signal into two and sending it to the CIO3 channel on each labjack as shown in IMG2. 

In another post I just made, I mentioned that at the start, the data from the two labjacks are slightly out of line depending on which one started streaming first, which is a problem for that post. However, I have noticed that most of the time, that delay is consistent throughout the entire data stream, but sometimes if I wait a while and jostle the labjacks/cables/foot pedal that delay can start to change a little bit, and one time I even saw the two forces swap at one point so that the one that was behind was now leading the other one. 

Sometimes when I connect them to the actual machine I plan to use them with, if I am streaming and then I power up the machine I will suddenly get a STREAM_SCANS_OVERLAP error.

I'm not entirely sure what could be causing these errors, but is it possible that sometimes the signal could have some sort of bleeding effect where when the power spike comes through it causes the CIO3 to trigger and scan too fast, or when I move stuff around maybe the split signal misses some pulses in one CIO3 channel or causes some extra signals in the other. 

I'm not too familiar with the electrical aspect of this, so I'm just wondering if any issues like this could arise from not wiring them properly. Perhaps I should be using some diodes or grounding the signal better in some way.   

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LabJack Support
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This sounds like it might be

This sounds like it might be noise in the clock line. The STREAM_SCANS_OVERLAP error is typically caused by setting a sample rate faster than the device can process the scan. It could indicate you are using AIN settings that are too high for your given clock, or perhaps noise is causing the device to see edges faster than your intended clock, which looks like a sampling rate above what the device can process. If one device is processing noise as edges but the other is not, that could also explain an apparent synchronization issue between the devices. I would recommend starting with the tests suggested in the other post:
https://labjack.com/forums/t7/externally-clocked-labjacks-different-star...